Laboratory for Software-Defined Networks
The Laboratory for Software-Defined Networks supports advanced education and research and development in software-defined networking (SDN), advanced packet-switching architectures, and hardware-software co-design of packet switch functions. It builds on the activities of the Laboratory for Telecommunication Networks, extending foundational knowledge of protocols, networks, and digital hardware towards the development and experimental evaluation of more complex systems.
In SDN, the emphasis is on network programmability, the separation of control functions from packet forwarding, and their integration into a complete system. This approach supports the study of interactions between software control and hardware packet processing, as well as the evaluation of new functions and architectural solutions.
Hardware–software co-design is a central activity, involving the coordinated development of hardware and software components, their responsibilities, and their communication interfaces. Development encompasses FPGA logic and embedded processor systems, including ARM and RISC-V architectures. Both hard processor cores built into the FPGA device and soft processor cores synthesised in programmable FPGA logic are used according to system requirements and platform capabilities.
The laboratory supports the advanced use of hardware description languages, RTL simulators, and processor instruction set simulators (ISS). Integrating these tools enables complete hardware-software co-verification, covering processor software, custom hardware modules, and their interactions within a shared simulation environment. The development process connects this verification with the implementation and testing of functional prototypes on FPGA platforms.
Application areas also include specialised architectures for secure communications, such as network encryptors that use keys supplied by quantum key distribution (QKD) systems. By bringing together network technologies, processor systems, and custom hardware, the laboratory provides an environment in which advanced education directly supports research and the development of new networking solutions.
Personel
Resources
The laboratory is equipped with a server, computer workstations, advanced network equipment, and licences for Altera Quartus Pro, AMD Vivado, and Questa tools. Terasic DE10-Pro and NetFPGA-SUME development boards, featuring high-end Altera and AMD FPGA devices, support the implementation of demanding packet node functions. The development and verification environment also includes embedded processor tools and instruction set simulators for integrated verification of processor software and system hardware components.































